It has been shown (Athas et al., 1994) that adiabatic switching can significantly reduce the dynamic power dissipation in an integrated circuit. Due to the overhead in the realization of adiabatic logic blocks (Saas et al., 2000) the best results are achieved when it is used only for charging dominant loads in an integrated circuit (Voss and Glessner, 2001). It has been demonstrated (Saas et al., 2001) that a multi stage driver is needed for minimal power dissipation. In this article a complete three stage driver including the generation of oscillating supply is described. To obtain a minimal power dissipation during synchronization the resonant frequency has to be constant. Therefore the waveforms for the logic states of the signal and the realization of a single stage differ from those presented in (Saas et al., 2001). In the H-SPICE simulations losses of the inductor are taken into account. This allows to estimate the power reduction that is achievable in a real system.