Improved fault tolerance of Turbo decoding based on optimized index assignments

. This paper investigates the impact of an error-prone buffer memory on a channel decoder as employed in modern digital communication systems. On one hand this work is motivated by the fact that energy efﬁcient decoder implementations may not only be achieved by optimizations on algorithmic level, but also by chip-level modiﬁcations. One of such modiﬁcations is so called aggressive voltage scaling of buffer memories, which, while achieving reduced power consumption, also injects errors into the likelihood values used during the decoding process. On the other hand, it has been recognized that the ongoing increase of integration density with smaller structures makes integrated circuits more sensitive to process variations during manufacturing, and to voltage and temperature variations. This may lead to a paradigm shift from 100 %-reliable operation to fault tolerant signal processing. Both reasons are the motivation to discuss the required co-design of algorithms and underlying circuits. For an error-prone receive buffer of a Turbo decoder the inﬂuence of quantizer design and index assignment on the error resilience of the decoding algorithm is discussed. It is shown that a suitable design of both enables a compensation of hardware induced bits errors with rates up to 1 % without increasing the computational complexity of the decoder.


Introduction
Two impact factors for the power consumption of a signal processing circuit can be identified: Power consumption of the logic (roughly related to the algorithmic complexity) and power consumption of the involved buffer memory.The latter is related to the number of read-write operations and their reduction has become a key factor when designing energy efficient algorithms.Especially in state-of-the-art baseband signal processing, where large blocks are often processed in an iterative fashion, memory access is a major power consuming part.At the same time, system on chips (SoCs) are dominated in terms of area by the embedded memory.
Given that embedded memories are already highly structured and highly optimized devices, there is less potential for energy optimization if hard quality constraints are reinforced.However, if relaxing quality requirements in a controlled fashion, significant energy reduction can be achieved: In aggressive voltage scaling (AVS) (Hegde and Shanbhag, 2001;Djahromi et al., 2007;Makhzan et al., 2007), the supply voltage of an embedded circuit is deliberately reduced below the required threshold.This leads to substantial reduction of power consumption, but also to unreliable operation of the circuit.But while the latter would introduce processing errors and serious performance degradation of the whole system if circuit logic was affected, it can be tolerated up to a certain level for some applications in case of embedded memories.This is for example true for baseband signal processing systems, like channel decoders, which are actually designed to deal with error-prone data and can thus be extended to deal with deliberately introduced errors as well.As an example, Hussien et al. (2010) propose an error-resilient Viterbi decoder architecture, where power savings of 15 % to 20 % are achieved while the bit error rate (BER) performance degradation is insignificant.
Besides deliberately introduced circuit failures, the increasing integration density of ICs also leads to an increased sensitivity against variations during the manufacturing process and harsh operating conditions (radiation, temperature) (Baumann, 2005;Borkar, 2005;Ghosh and Roy, 2010;Mitra et al., 2011).These so called single event upsets have been traditionally tackled on circuit level and there is vast amount of research in this field, c.f. e.g.Mitra et al. (2005); Published by Copernicus Publications on behalf of the URSI Landesausschuss in der Bundesrepublik Deutschland e.V. Yoshimoto et al. (2012).However, it has also been recognized (Shanbhag et al., 2010;Mitra et al., 2010;Karakonstantis et al., 2012;Kleeberger et al., 2013), that the development of fault tolerant (error resilient) systems cannot be dealt with in a single perspective, but rather that a crosslayer view is required: A co-design of embedded circuits and signal-processing algorithms will be necessary to efficiently exploit potentials of approaches like AVS and to obtain relatively reliable systems based on unreliable underlying components.This approach constitutes a "paradigm shift from 100 %-reliable operation to fault tolerant signal processing" (Novak et al., 2010).
In context of baseband signal processing and channel decoding, a few authors have addressed a co-design with erroneous circuits under different conditions: The inherent fault-tolerance of communication systems is exploited by Djahromi et al. (2007), where the authors identify a duality between communication channel errors and hardware induced errors.Based on this observation they propose to adapt the supply voltage depending on the current working condition of the system; by reducing the supply voltage in case of good reception conditions they achieve power savings of around 45 % in a WCDMA receiver The resilience of Viterbi and MaxLog decoding against timing errors and memory errors introduced by voltage overscaling is treated in Liu et al. (2009), where power savings of about 44 % and 38 % are reported for Viterbi and MaxLog decoders, respectively.The authors of Abdallah and Shanbhag (2009) also deal with Viterbi decoding and the influence of timing errors due to process variations and voltage scaling.They investigate several low level methods to improve error resilience and achieve significant power savings of up to 71 % with a small tolerated loss of coding gain.A more abstract treatment of error-resilient Viterbi decoding using an erroneous receive buffer is provided by Hussien et al. (2010), where the authors employ a statistical model of the combined communication channel and hardware noise to derive a suitable branch metric.They also show that the branch metric computation can be kept simple in case of Two's complement representation of the quantization symbols and report a reduction of power consumption in the order of 15 % to 20 % with small loss of coding gain.The authors extend their approach in Hussien et al. (2011) to LDPC and Turbo decoders considering the receive (ARQ) buffer; in Khairy et al. (2012) they also study its application to MIMO detection.For an LDPC decoder Alles et al. (2007); May et al. (2008) propose a reliabilityaware design, which improves the protection against timing and signal errors by using simple error correction and detection techniques.Low and high level approaches to improve error-resilience of a Turbo decoder are investigated by Brehm et al. (2012).On algorithm level, the authors propose an increase of iteration number to facilitate resilience against timing errors and soft errors.The same authors also study the resilience of a MIMO-BICM system with iterative receiver and hardware errors that manifest as transient bit errors in various components (Gimmler-Dumont et al., 2012) and conclude that for low error rates, performance of the original system can almost be retained by employing additional iterations.
Considering the problem of improving resilience of channel decoding algorithms against memory defects under more general, algorithmic perspective, it is interesting, that only the works by Kurdahi, Eltawil, et al. (Hussien et al., 2010, 2011) consider modification and adaption of the decoding algorithm itself.Furthermore, the strong relation of the given problem to source channel coding and robust quantizer design has only been pointed out in Novak et al. (2010); Roth et al. (2012), while its significance is long known in those fields.Novak et al. (2010) consider a MIMO BICM system with unreliable storage of the received log-likelihood ratio (LLR) values.The authors investigate the influence of (redundant) index assignments and simple forward error correction codes for the indices in terms of achievable rate and conclude that in case of non-redundant indices the selection of a robust index assignment is crucial, while in case of redundant labels the decision between simple FEC coding and customized index assignment depends on the SNR operation state of the underlying system.The authors address the first point more extensively in Roth et al. (2012) and stress the importance of application specific index assignments.They discuss the cases of repetition coding and convolutional coding and derive optimized index assignments through exhaustive search.For a Turbo decoder with unreliable LLR buffer, an index assignment optimization strategy based on the EXIT characteristics of the decoder is described in Geldmacher and Götze (2013).The authors show that the resulting assignments provide improved error-resilience without increasing decoding complexity.
In this article, the influence of optimized index assignment and quantizer design on a Turbo decoder with unreliable receive buffer memory is studied.This scenario of communication channel with quantized output and successive unreliable buffer memory is modeled as a cascade of two discrete memoryless channels (DMCs); the index assignment is regarded as a way to connect both DMCs.It is shown that joint optimization of index assignment and quantizer can significantly improve error-resilience of the decoder, without increasing its computational complexity.

System model
The model shown in Fig. 1 is employed to discuss the problem of an unreliable buffer memory.A source generates Gaussian distributed values r from the original equiprobable and independent symbols x ∈ {±1}, r = µ r x + n, where n ∼ N (0, σ 2 r ).
(1) The source abstractly models for example an AWGN communication channel, with a certain gain µ r and a noise variance σ 2 r , or it may be a so called a priori channel representing a SISO component in an iterative processing system, e.g. a MAP decoder.Given the continuous, Gaussian distributed values r, the N -Bit quantizer assigns discrete reconstruction values r from a finite set Q of size |Q| = 2 N in a suitable fashion.In the following the quantizer is designed using uniform and fixed reconstruction values from a set where d and f are decimal and fractional bits and d +f = N.This approach is simple and might not include the optimum quantizer design with respect to the mean-squarederror (MSE) or the average mutual information (MI), but it seems practically relevant and enables us to discuss effects of the memory channel disturbance.To account for changing channel conditions (µ r and σ 2 r ), the scaling factor γ can be used as an adaptive gain control and scale the quantizer input to the quantization range.In some use cases, for example if the source models a constituent decoder in a Turbo decoding framework, the scaler γ might, however, be fixed for practical reasons.Given the set Q, the probability mass function (PMF) P (r|x) of the quantized values r conditioned on x can be found by integrating over the individual quantization intervals.
The quantization scheme coincides with the Two's complement representation, if the assignment from quantization index k to the index i, whose binary representation is stored in the buffer, is selected as i = k ⊕ 2 d−1 with ⊕ denoting the XOR operation and i ∈ {0, . . ., 2 N−1 }.In general, however, any mapping from quantization values to indices may be used.We refer to this bijective mapping as the index assignment and denote a specific one-to-one relation between k and i by , i = (k), and its reverse as −1 .The binary representation of the integer i is written to the buffer memory.As in Novak et al. (2010); Khajeh et al. (2010), spatially independent and uniformly distributed errors on the memory cells are assumed, such that the memory channel can be seen as a binary symmetric channel (BSC) with input and output the binary representations of i and j , respectively.It is referred to as the memory channel in the following.Given the bit error probability p e , the probability of reading an index j under the condition that i has been written to the memory is given as where d H (i, j ) is the Hamming distance between i and j .
Given the fact that the index assignment is a bijective mapping, then for the PMF of the reconstructed quantization symbols r ∈ Q conditioned on x it holds that P (r|x) = P ( −1 (j )|x). (4)

Characteristics of memory channel
The transmission matrix (Cover and Thomas, 1991, p. 189) of the AWGN channel with quantized outputs and binary input is a (2 × 2 N )-matrix and it can be written as with q k ∈ Q the reconstruction values of the quantizer.The (2 N × 2 N )-matrix of the memory channel is given as To obtain the transmission matrix P(r|x) of the concatenation of both channels, the index assignment has also to be considered.As it is a mapping of quantizer output to memory channel input, it may be represented by a matrix , that permutes the columns of P(r|x) in the required order.The reverse permutation has to be applied to the columns of P(j |i) using the transpose of .Then we have the transmission matrix as where is for example given as or as = I 2 N for natural binary coding (NBC).From Eq. ( 7) it is already apparent that the concatenation of quantized AWGN channel and unreliable buffer memory can be seen as cascade of two DMCs.Figure 2 illustrates this cascade for the case of N = 2 Bit and Two's complement index assignment.It can be noted that the index assignment is just a way of connecting the first DMC to the second one.To derive the transmission matrix it has intuitively been assumed, as illustrated in Fig. 2, that the output of the memory channel only depends on its input, such that P (r|r, x) = P (r|r). (9) Now let R, R and X be the random variables representing r, r and x, respectively.Then Eq. ( 9) is justified by the observation that once R is known, R cannot reveal any additional information about X, because there is no connection between X and R other than the cascade of communication and memory channel.This means that the MI of X and R conditioned on R vanishes, and thus X, R, R form a Markov chain X → R → R. Now some interpretations can be derived: First the chain rule of mutual information (Cover and Thomas, 1991, p. 22) may be applied as Then using Eq. ( 10) yields Equation ( 12) shows that the MI of R and X can only be smaller than or equal to the MI of R and X, given nonnegativity of the MI.Equality holds if p e = 0, in which case R = R and consequently I (X; R|R) = 0: I (X; R) < I (X; R) for p e > 0 and Thus the memory channel output will be degraded if p e > 0, while it matches the output of the communication channel for p e = 0.The term I (X; R|R) from Eq. ( 12), which denotes the MI loss at memory channel output, can be further rewritten, and it can be seen that the degradation of MI depends on -the error probability p e of the memory channel, represented by the MI I (R; R) of its in-and output, -on the design of the quantizer, represented by the entropy H (R) of its output, and -the interaction of all components, including the index assignment, represented by H (R|R, X).
Thus in order to optimize the MI I (X; R) and with it the MI loss due to the memory channel, all system parameters have to be jointly taken into account.Therefore, the optimization should be carried out subject to the quantizer (represented by the scaler γ ) and the index assignment .This approach is investigated in the following section for a Turbo decoding scenario.
3 Turbo decoder with unreliable receive buffer

System model
In the following, the transmission of BPSK-modulated Turbo coded data with rate R c over a communications channel is modeled as shown in Fig. 3: Binary information symbols u are encoded using two parallel concatenated recursive systematic convolutional encoders, such that the coded symbols v consist of a systematic part and two parity parts from first and second encoder.BPSK modulation of v results in the equally probable modulation symbols x = 2v−1.A gain factor µ r may be applied, such that the symbols µ r x are transmitted eventually.
The communication channel is modeled as an AWGN channel, so that the received values r can be written as where σ 2 r denotes the noise power of the channel.The channel is characterized by its signal-to-noise ratio: Before quantization, the received symbols are weighted with the channel reliability L c and scaled to the quantizers dynamic range using γ .It is assumed that perfect channel state information is available to the receiver, such that the quantizer input will be the scaled LLR The quantizer assigns reconstruction values r from the set of Two's complement values as given in Eq. ( 2 interleaved/de-interleaved and become the a priori LLRs λ of the second/first decoder in the next stage. and length 2 15 random interleaver is employed in the following.Both encoders are terminated and the resulting tails are transmitted along with the systematic and parity parts.The transmission gain is µ r = 1.In the fol-345 lowing a conventional LogMAP based Turbo decoder is compared to a fault tolerant (FT) decoder.The number of iterations carried out by the decoder is fixed to 8. The FT decoder works like the conventional decoder, with the exception that its transition metric is based on the actual transition proba-350 bility P (r|x) of the cascade of communication and memory channel (Geldmacher and Götze, 2012).It employs a look-up table (LUT) of size 2 N which holds the log domain representation of P (r|x).The values obtained by indexing this LUT using the indices j replace the received values in the transition metric of a conventional MAP algorithm.The LUT is constructed once per received frame by estimating the statistics of r, computing P (r|x) based on (7) and storing its logarithm.

Optimized Index Assignment
Following (13), the unreliable receive buffer, represented by a BSC with error probability p e will cause a decrease of MI.The MI I(X; R) is clearly a function of P (r|x) which in turn depends for a fixed E b /N 0 , p e and Q on the scaling parameter γ and the index assignment Π.Thus the MI for a given pair (γ, Π) is denoted by I (γ,Π) (X; R).Consequently it is reasonable that for a given E b /N 0 , p e and Q, there is a combination (Π * , γ * ) that maximizes I (γ,Π) (X; R): Problem ( 18) can be solved by first finding optimized Π * (γ) for reasonable values of γ: Then γ * can be selected as which yields the optimal combination of (Π * , γ * ).
Solving ( 19) for an optimized index assignment Π * (γ) is a combinatorial optimization problem.Given the fact, that the number of possible index assignments for an N -Bit quantization is given by (2 N )!, from which (2 N − 1)!/N !yield distinct results (Azami et al., 1996), one has therefor to re-380 sort to heuristic optimization algorithms for N > 3. A metaheuristic which had already turned out efficient for other combinatorial problems is simulated annealing (e.g.Reeves (1993); Farvardin (1990)); it is employed in this work to solve (19).

385
The result of this optimization is illustrated in Fig. 4 (left), where the MI I(X; R) is shown as a function of the scaler γ for optimized index assignment Π * and NBC Π NBC .In general it can be noticed, that the memory channel causes a reduction of achievable MI I(X; R) compared to the ref-390 erence I(X; R).Also, it can be observed that the MI depends on γ and that the optimal γ is different in all considered cases.This implies that even if the index assignment is not modified, the scaling factor should be adapted to the memory channel, because otherwise, a performance reduc-395 tion may take place: For example, taking N = 4, the optimal scaler for p e = 0 (I(X; R), "Ref") is about 2, which leads to I(X; R) = 0.370 (Π * and Π NBC ), while actually greater MI would be possible by selecting γ = 3.The figure also shows that a larger quantization width than actually required to ac-400 curately represent R for a larger gain due to the optimized index assignment: While for N = 4 there is only little improvement of Π * over Π NBC , a larger quantization width of N = 6 enables a significantly increased I(X; R).The reason for this can be found in the larger redundancy available in R, 405 which provides more degrees of freedom to the index assignment optimization, and thus yields a more effective protection against errors induced by the memory channel.

EXIT Chart
The influence of optimized index assignment and quantiza-410 tion width N on the decoding behaviour is first studied using EXIT charts.Consider Fig. 4 (right), where the performance of conventional Turbo decoder ("MAP") and FT decoder ("FTMAP") using NBC index assignment (Π NBC ) are compared for two different quantization widths N = 4 and N = 6 415 and p e = 0.01.As a reference the chart for a decoder with p e = 0 and identical quantization settings is shown ("Ref.")-given the width of the tunnel, it can be expected that the decoder will converge at this E b /N 0 level.If, however, the between the two constituent decoders.Both constituent decoders implement the BCJR algorithm (Bahl et al., 1974) in log-domain on the trellis of the encoder to produce extrinsic LLRs λ E of the information symbols: More concisely, the first decoder employs the systematic part and the first parity part of r, while the second decoder uses the interleaved systematic part and the second parity part of r.The extrinsic LLRs λ E generated by the first/second decoder are interleaved/de-interleaved and become the a priori LLRs λ of the second/first decoder in the next stage.
A rate R c = 1/3 Turbo code with generator G(D) = 1, D 3 +D+1 D 3 +D 2 +1 and length 2 15 random interleaver is employed in the following.Both encoders are terminated and the resulting tails are transmitted along with the systematic and parity parts.The transmission gain is µ r = 1.In the following a conventional LogMAP based Turbo decoder is compared to a fault tolerant (FT) decoder.The number of iterations carried out by the decoder is fixed to 8. The FT decoder works like the conventional decoder, with the exception that its transition metric is based on the actual transition probability P (r|x) of the cascade of communication and memory channel (Geldmacher and Götze, 2012).It employs a look-up table (LUT) of size 2 N which holds the log domain representation of P (r|x).The values obtained by indexing this LUT using the indices j replace the received values in the transition metric of a conventional MAP algorithm.The LUT is constructed once per received frame by estimating the statistics of r, computing P (r|x) based on Eq. ( 7) and storing its logarithm.

Optimized index assignment
Following Eq. ( 13), the unreliable receive buffer, represented by a BSC with error probability p e will cause a decrease of MI.The MI I (X; R) is clearly a function of P (r|x) which in turn depends for a fixed E b /N 0 , p e and Q on the scaling parameter γ and the index assignment .Thus the MI for a given pair (γ , ) is denoted by I (γ , ) (X; R).Consequently it is reasonable that for a given E b /N 0 , p e and Q, there is a combination ( * , γ * ) that maximizes I (γ , ) (X; R): * , γ * = arg max Problem Eq. ( 18) can be solved by first finding optimized * (γ ) for reasonable values of γ : Then γ * can be selected as which yields the optimal combination of ( * , γ * ).Solving Eq. ( 19) for an optimized index assignment * (γ ) is a combinatorial optimization problem.Given the fact, that the number of possible index assignments for an N-Bit quantization is given by (2 N )!, from which (2 N − 1)!/N! yield distinct results (Azami et al., 1996), one has therefor to resort to heuristic optimization algorithms for N > 3. A metaheuristic which had already turned out efficient for other combinatorial problems is simulated annealing (e.g.Reeves, 1993;Farvardin, 1990); it is employed in this work to solve Eq. ( 19).
The result of this optimization is illustrated in Fig. 4 (left), where the MI I (X; R) is shown as a function of the scaler γ for optimized index assignment * and NBC NBC .In general it can be noticed, that the memory channel causes a reduction of achievable MI I (X; R) compared to the reference I (X; R).Also, it can be observed that the MI depends on γ and that the optimal γ is different in all considered cases.This implies that even if the index assignment is not modified, the scaling factor should be adapted to the memory channel, because otherwise, a performance reduction may take place: For example, taking N = 4, the optimal scaler for p e = 0 (I (X; R), "Ref") is about 2, which leads to I (X; R) = 0.370 ( * and NBC ), while actually greater MI would be possible by selecting γ = 3.The figure also shows that a larger quantization width than actually required to accurately represent R allows for a larger gain due to the optimized index assignment: While for N = 4 there is only little improvement of * over NBC , a larger quantization width of N = 6 enables a significantly increased I (X; R).The reason for this can be found in the larger redundancy available in R, which provides more degrees of freedom to the index assignment optimization, and thus yields a more effective protection against errors induced by the memory channel.received values experience additional distortion due to the 420 memory channel, then the tunnel becomes much smaller and decoding performance will be deteriorated.In Fig. 4 (right), where a quantization width of N = 4 is used, this impact appears like a small SNR degradation on the communication channel and manifests as a reduction of the EXIT tun-425 nel.It can also be observed, that in this case, there is only very little difference between the conventional decoder and the fault tolerant decoder, and only very close observation reveals the slight improvement due to latter.Convergence to BERs smaller than about 0.08 cannot be expected for both 430 decoders.However, increasing the quantization width to N = 6 Bit, as shown Fig. 5, leads to a significant difference between both decoders: The conventional decoder exhibits a substan- tial performance degradation, which is indicated by a very 435 early crossing of the EXIT curves.In fact even for very good a priori information (I(X; Λ) → 1), the decoder is not capable of producing improved extrinsic information, such that decoding performance is expected to be strongly degraded.
The FT decoder on the other hand shows an improved EXIT 440 chart compared to the N = 4 case: While the tunnel is still considerably smaller than for the reference, the curves do not intersect and given a sufficient number of iterations the decoder may be able to achieve reference BER performance.Thus it can be concluded that while an increased quantiza-445 tion width amplifies the impact of the memory channel and degrades performance of a conventional decoder, it also enables improved error-resilience due to increased redundancy  received values experience additional distortion due to the 420 memory channel, then the tunnel becomes much smaller and decoding performance will be deteriorated.In Fig. 4 (right), where a quantization width of N = 4 is used, this impact appears like a small SNR degradation on the communication channel and manifests as a reduction of the EXIT tun-425 nel.It can also be observed, that in this case, there is only very little difference between the conventional decoder and the fault tolerant decoder, and only very close observation reveals the slight improvement due to latter.Convergence to BERs smaller than about 0.08 cannot be expected for both 430 decoders.However, increasing the quantization width to N = 6 Bit, as shown Fig. 5, leads to a significant difference between both decoders: The conventional decoder exhibits a substan- tial performance degradation, which is indicated by a very 435 early crossing of the EXIT curves.In fact even for very good a priori information (I(X; Λ) → 1), the decoder is not capable of producing improved extrinsic information, such that decoding performance is expected to be strongly degraded.
The FT decoder on the other hand shows an improved EXIT 440 chart compared to the N = 4 case: While the tunnel is still considerably smaller than for the reference, the curves do not intersect and given a sufficient number of iterations the decoder may be able to achieve reference BER performance.Thus it can be concluded that while an increased quantiza-445 tion width amplifies the impact of the memory channel and degrades performance of a conventional decoder, it also enables improved error-resilience due to increased redundancy

EXIT chart
The influence of optimized index assignment and quantization width N on the decoding behaviour is first studied using EXIT charts.Consider Fig. 4 (right), where the performance of conventional Turbo decoder ("MAP") and FT decoder ("FTMAP") using NBC index assignment ( NBC ) are compared for two different quantization widths N = 4 and N = 6 and p e = 0.01.As a reference the chart for a decoder with p e = 0 and identical quantization settings is shown ("Ref.")-given the width of the tunnel, it can be expected that the decoder will converge at this E b /N 0 level.If, however, the received values experience additional distortion due to the memory channel, then the tunnel becomes much smaller and received values experience additional distortion due to the memory channel, then the tunnel becomes much smaller and decoding performance will be deteriorated.In Fig. 4 (right), where a quantization width of N = 4 is used, this impact appears like a small SNR degradation on the communication channel and manifests as a reduction of the EXIT tunnel.It can also be observed, that in this case, there is only very little difference between the conventional decoder and the fault tolerant decoder, and only very close observation reveals the slight improvement due to latter.Convergence to BERs smaller than about 0.08 cannot be expected for both decoders.
However, increasing the quantization width to N = 6 Bit, as shown Fig. 5, leads to a significant difference between both decoders: The conventional decoder exhibits a substan- tial performance degradation, which is indicated by a very 435 early crossing of the EXIT curves.In fact even for very good a priori information (I(X; Λ) → 1), the decoder is not capable of producing improved extrinsic information, such that decoding performance is expected to be strongly degraded.
The FT decoder on the other hand shows an improved EXIT 440 chart compared to the N = 4 case: While the tunnel is still considerably smaller than for the reference, the curves do not intersect and given a sufficient number of iterations the decoder may be able to achieve reference BER performance.Thus it can be concluded that while an increased quantiza-445 tion width amplifies the impact of the memory channel and degrades performance of a conventional decoder, it also enables improved error-resilience due to increased redundancy  decoding performance will be deteriorated.In Fig. 4 (right), where a quantization width of N = 4 is used, this impact appears like a small SNR degradation on the communication channel and manifests as a reduction of the EXIT tunnel.It can also be observed, that in this case, there is only very little difference between the conventional decoder and the fault tolerant decoder, and only very close observation reveals the slight improvement due to latter.Convergence to BERs smaller than about 0.08 cannot be expected for both decoders.However, increasing the quantization width to N = 6 Bit, as shown Fig. 5, leads to a significant difference between both decoders: The conventional decoder exhibits a substantial performance degradation, which is indicated by a very early crossing of the EXIT curves.In fact even for very good Adv.Radio Sci., 12,[187][188][189][190][191][192][193][194][195]2014 www.adv-radio-sci.net/12/187/2014/a priori information (I (X; ) → 1), the decoder is not capable of producing improved extrinsic information, such that decoding performance is expected to be strongly degraded.
The FT decoder on the other hand shows an improved EXIT chart compared to the N = 4 case: While the tunnel is still considerably smaller than for the reference, the curves do not intersect and given a sufficient number of iterations the decoder may be able to achieve reference BER performance.Thus it can be concluded that while an increased quantization width amplifies the impact of the memory channel and degrades performance of a conventional decoder, it also enables improved error-resilience due to increased redundancy in quantizer output.Exploitation of this redundancy requires the FT decoder though.As suggested by Fig. 4 (left) a higher quantization width and an optimized index assignment w.r.t.Eq. ( 18) can yield further improvement.Figures 6 and 7 therefore compare EXIT charts of the FT decoder for NBC ( NBC ) and optimized index assignments ( * ).In Fig. 6 a quantization width of N = 4 is employed.The limited redundancy in R and smaller degrees of freedom during the optimization do not allow for any gain of the optimized index assignment over NBC in this case.Both charts are identical.But with N increased by two Bit, the optimization becomes more effective as shown in Fig. 7.The tunnel nearly approaches the reference, indicating that the decoder will converge with less iterations than in the NBC case.
A general observation from the presented EXIT charts is that an unreliable receive buffer leads to degradation in the lower to medium part of the chart.This is due to the fact that during the ongoing decoding process the extrinsic LLRs become more important than the received values.Regarding the BER performance, we thus expect a degradation of decoding threshold but only marginal impact on the error floor, because low BERs are represented by the very upper part of the chart, where the received values only have small impact.

BER
Figure 8 shows performance results for a Turbo decoder with unreliable receive buffer in terms of the BER.The scaling factor γ is computed as a linear function of E b /N 0 .The coefficients of this function have been found by linear fit of the solution of Eq. ( 20) for a suitable range of E b /N 0 and for each of the considered index assignments (cf.Geldmacher and Götze, 2012).
In Fig. 8 (left) the performance of FT and conventional Turbo decoder are compared for p e = 0.01, where both decoders employ NBC.The number of quantization bits is varied from 4 to 6, that is N = 4, 5, 6.First of all it can be observed, that the additional distortion due to the memory channel increases the decoding threshold, but does not affect the error floor -thus it acts like a decreased SNR on the communications channel as noted before.When comparing both decoders, it can be noticed that the FT decoder outper- in quantizer output.Exploitation of this redundancy requires the FT decoder though.
As suggested by Fig. 4 (left) a higher quantization width and an optimized index assignment w.r.t. ( 18) can yield further improvement.Figs. 6 and 7 therefore compare EXIT charts of the FT decoder for NBC (Π NBC ) and optimized index assignments (Π * ).In Fig. 6 a quantization width of 455 N = 4 is employed.The limited redundancy in R and smaller degrees of freedom during the optimization do not allow for any gain of the optimized index assignment over NBC in this case.Both charts are identical.But with N increased by two Bit, the optimization becomes more effective as shown in 460 Fig. 7.The tunnel nearly approaches the reference, indicating that the decoder will converge with less iterations than in the NBC case.
A general observation from the presented EXIT charts is that an unreliable receive buffer leads to degradation in the 465 lower to medium part of the chart.This is due to the fact that during the ongoing decoding process the extrinsic LLRs become more important than the received values.Regarding the BER performance, we thus expect a degradation of decoding threshold but only marginal impact on the error floor, 470 because low BERs are represented by the very upper part of the chart, where the received values only have small impact.forms the conventional decoder.Furthermore it can be seen that an increased quantization width slightly improves errorresilience: Baseline performance is approached earlier if 5 or 6 Bit are employed instead of only 4 Bit.

BER
To take into account the impact of the index assignment we now compare performance of the FT decoder with optimized index assignment and the conventional decoder with NBC.
For p e = 0.01, the plot in Fig. 8 (middle) shows the influence of an increased quantization width for this scenario.A significantly improved performance can be observed for the FT decoder with higher quantization width: Actually, for N = 6 the FT decoder completely compensates the disturbance due to the memory channel for BERs smaller than 10 −5 , since the higher redundancy involved with the larger quantization width can be exploited more efficiently by the index assignment optimization.This is in accord with the conclusion from the EXIT chart analysis in the previous section.
The impact of the error probability p e is shown in Fig. 8 (right) for N = 6.Taking a BER working point of 10 −5 it can be seen that error rates of p e = 0.005 and p e = 0.01 are completely compensated by the FT decoder with optimized index assignment, while for p e = 0.05 a loss of about 0.4 dB can be observed.The performance of the conventional decoder on the other hand is significantly degraded.
In order to quantify the loss of coding gain E b /N 0 associated with a certain p e at a given working point, Fig. 9 compares the performance of a conventional decoder and a FT decoder with each N = 4 Bit and NBC, and a FT decoder with N = 6 and optimized index assignment.Taking for example a relatively strong memory channel distortion of about p e = 0.05 it can be seen that the conventional decoder with NBC and N = 4 requires an additional 1.7 dB to achieve a BER of 10 −5 compared to a Turbo decoder with error-free buffer memory.

Conclusions
Increasing integration depths of integrated circuits may lead 5 to higher susceptibility against process variations and soft error events.Similarly, aggressive voltage scaling can yield unreliable operation of logic and memory of an integrated circuit.Developing signal processing algorithms that can to some extend deal with unreliable underlying hardware is thus 0 an emerging problem.In this paper a Turbo decoder with an unreliable receive buffer was studied.This buffer is modeled as a binary symmetric channel that acts on the quantized received values.It can thus be seen as an additional discrete memoryless channel that is cascaded to the actual communi-5 portant impact factor on the resilience of the Turbo decoder against errors originating from the memory channel.For a decoder with a transition metric adapted to the actual sta-550 tistical model of the channel cascade, a joint optimization of both components yields improved error-resilience without increasing the computational complexity of the decoder.
NBC reduces this loss to about 0.95 dB.Further improvement is achieved by spending 2 additional Bits and employing an optimized index assignment: In this case the loss of coding gain is reduced to 0.4 dB.It general it can be observed from the figure that the latter configuration outperforms the first two and can even completely compensate the impact of the memory channel for p e up to 1 %.If only N = 4 Bit are employed, there still is a benefit from the FT decoder for p e ≥ 0.005, since it reduces the loss of coding gain by about 40 % to 50 %.

Conclusions
Increasing integration depths of integrated circuits may lead to higher susceptibility against process variations and soft error events.Similarly, aggressive voltage scaling can yield unreliable operation of logic and memory of an integrated circuit.Developing signal processing algorithms that can to some extend deal with unreliable underlying hardware is thus an emerging problem.In this paper a Turbo decoder with an unreliable receive buffer was studied.This buffer is modeled as a binary symmetric channel that acts on the quantized received values.It can thus be seen as an additional discrete memoryless channel that is cascaded to the actual communication channel.The interaction of both channels, represented by quantizer and index assignment, was identified as an important impact factor on the resilience of the Turbo decoder against errors originating from the memory channel.For a decoder with a transition metric adapted to the actual statistical model of the channel cascade, a joint optimization of both components yields improved error-resilience without increasing the computational complexity of the decoder.
Edited by: W. Mathis Reviewed by: two anonymous referees

Figure 2 .
Figure 2. Abstract representation of the AWGN channel with successive quantizer and unreliable buffer memory as DMC cascade.

Fig. 3 .
Fig. 3. System model for Turbo coded transmission with unreliable receive and LLR buffer.

Figure 3 .
Figure 3. System model for Turbo coded transmission with unreliable receive and LLR buffer.

Figure 4 .Fig. 4 .
Figure 4. Left: Mutual information after receive buffer for NBC and optimized index assignment for N = 4 and N = 6 (E b /N 0 = 0.5 dB, p e = 0.01, R c = 1/3).Right: EXIT chart of conventional and FT Turbo decoder with unreliable receive buffer for N = 4 (p e = 0.01, E b /N 0 = 0.25 dB, NBC, BER estimate as contour lines).

Figure 5 .
Figure 5. EXIT chart of conventional and FT Turbo decoder with unreliable receive buffer for N = 6 (p e = 0.01, E b /N 0 = 0.25 dB, NBC, BER estimate as contour lines).

Fig. 4 .
Fig. 4. Left: Mutual information after receive buffer for NBC and optimized index assignment for N = 4 and N = 6 (E b /N 0 = 0.5dB, p e = 0.01, R c = 1/3).Right: EXIT chart of conventional and FT Turbo decoder with unreliable receive buffer for N = 4 (p e = 0.01, E b /N 0 = 0.25dB, NBC, BER estimate as contour lines)

Fig. 8
Fig.8shows performance results for a Turbo decoder with unreliable receive buffer in terms of the BER.The scaling 475

net/12/187/2014/ Figure 1. Model
of a Gaussian source with successive quantizer and buffer memory.