A novel ZePoC encoder for sinusoidal signals with a predictable accuracy for an AC power standard

. In this paper we present an analytical formulation of a Zero Position Coding (ZePoC) encoder for an AC power standard based on class-D topologies. For controlling a class-D power stage a binary signal with special spectral characteristics will be generated by this ZePoC encoder for sinusoidal signals. These spectral characteristics have a predictable accuracy within a separated baseband to keep the noise ﬂoor below a speciﬁed level. Simulation results will validate the accuracy of this novel ZePoC encoder. For a real-time implementation of the encoder on a DSP/FPGA hardware architecture a trade-off between accuracy and speed of the ZePoC algorithm has to be made. Therefore the numerical effects of different ﬂoating point formats will be analyzed.


Introduction
ZePoC was invented and initially implemented for audio coding by the Institut für Theoretische Elektrotechnik (TET).The main advantages of a complete digital class-D power amplifier using ZePoC are the low switching rate and the separated baseband (Streitenberger, 2005).A lot of effort was made to develop a prototype of the ZePoC audio power amplifier resulting in a number of publications.A good overview can be found in the white paper from Texas Instruments (Texas Instruments, 2005).
ZePoC is also ideal for an AC power standard based on class-D topologies (Wellmann, 2010).An AC power standard consists of two channels.One channel provides a highly accurate sinusoidal voltage and the other one a highly accurate sinusoidal current.The mathematical methods presented in this contribution are suitable for both channels.Figure 1 represents the block diagram of the voltage channel.
The ZePoC encoder is implemented on a digital signal processor (DSP).Depending on some encoding parameters the duty cycle of a pulse width modulated (PWM) signal is computed and transferred to a field programmable gate array (FPGA) via an I 2 S interface.A pulse shaper implemented on the FPGA converts the received duty cycles into a bit stream.This bit stream is a time discrete form of the binary PWM signal.A gigabit serializer inside the FPGA allows a transmission of the binary signal with a very high time resolution.
To amplify the binary PWM signal a class-D power stage is used.An inverting driver controls a P-channel and a Nchannel MOSFET.At the output of the power stage the high voltage of the PWM signal equals V DD and the low voltage equals V SS .If V DD and V SS are derived from natural constants using a physical effect (e.g.Josephson effect), the amplitude of the amplified PWM signal is highly accurate.The problem of harmonic distortions caused by non-ideal switching transients of the power stage and the static drainto-source on-resistance of the MOSFETs is not content of this paper.
At the end of the signal chain an analogue low pass filter (LPF) is used to suppress the disturbances caused by the switching.This is only possible because of the separated baseband which ensures a spectral gap between the AC signal and the switching disturbances at higher frequencies.The absolute value of the LPF frequency response has to be equal to one at the frequency of the AC signal.All rising edges are equidistant in time, while the falling edges are modulated.The modulation is done by controlling the switch-on time of each period.For this purpose the duty cycle τ ∈ (0, 1) is used.τ ≤ 0 or τ ≥ 1 violate the switching condition (overmodulation) and have to be avoided by the ZePoC encoder.
For generating the binary PWM signal a digital pulse shaper is used.The main characteristic of a pulse shaper is its time resolution.In a synchronous digital circuit the change of output signals is only possible in a discrete time grid determined by the clock frequency.Therefore a very high time resolution is necessary to guarentee high accuracy.
The DSP used for this application is an ADSP-21369KBPZ-3A manufactured by Analog Devices.This DSP contains a digital PWM generator supporting a maximum clock frequency of 200 MHz (Analog Devices, 2013).If the binary signal is directly generated by the DSP, the time resolution is only 5 ns.
To increase the performance of the PWM generator inside the DSP a special module containing delay lines and analogue multiplexers was developed (Weber, 2014).This module is able to enhance the time resolution up to approximately 313 ps without increasing any of the clock frequencies.
A better time resolution and jitter performance could be achieved with a FPGA.The Altera Arria V GX 5AGXFB3H4F35C4N contains 24 transceivers supporting clock frequencies up to 6.5536 GHz (Altera, 2015).A serializer is part of each transceiver and is able to generate a binary signal with a time resolution up to approximately 153 ps.

Spectral characteristics of the PWM signal
The noise floor inside the separated baseband has to be lower than −120 dB.For this a minimum amount of 10 6 = 1 000 000 possible positions for the falling edge between two enframing rising edges are necessary.In digital systems it is often useful to deal with powers of two. 2 20  = 1 048 576 is chosen which leaves a margin of 4.8 % to define an adequate minimum pulse width.With a serializer running at 6.5536 GHz the switching frequency of the PWM signal is f sw = 6.5536GHz 2 20 = 6.25 kHz. (1) Figure 3 shows the spectral characteristics of the binary PWM signal.The frequency of the carrier signal f c = 1 2 f sw defines the separated baseband 0 ≤ f < f c .One sinusoidal AC signal with frequency f a = 1 c f c and amplitude a is inside the signal band 0 < f < f a,max .The upper limit f a,max depends on the frequency response H LPF,A of the analogue LPF and c is the frequency factor between f a and f c .

ZePoC encoder
The block diagram of the ZePoC encoder is displayed in Fig. 4. Real and imaginary part of complex signals are processed separately and indexed with "R" and "I".Only the open-loop structure allows to find an analytical formulation for the modulated signal m(t).In the following subsections the ZePoC encoder and its analytical formulation are described in detail.

Input signal
The input signal must be an analytical sinusoidal signal with an adjustable amplitude a.To avoid overmodulation the factor a is limited to γ which defines also the minimum pulse width of the binary output signal b(t).To simplify all equations the time variable t will be defined as t := ωT .The time function and its Hilbert transform results in the analytical input signal

Analytical exponential modulation (AEM)
The AEM is defined as which could be separated into its real and imaginary part The cosine and the sine term describe a vector in the complex plane.The complex signal X(a, t) is limited to 1 in polar notation.X(a, t) is not depicted in Fig. 4 because it is only the definition of the AEM.
To expand all possible positions of the vector described in Eq. ( 6) to a half circle in the complex plane the arguments have to be multiplied with π 2 .Because of the complex input signal F (a, t) the argument of the exponential term has to be multiplied with the same factor.Finally the constant factor e − π 2 must be appended to limit the output signals of the AEM Y R (a, t) and Y I (a, t) to the closed interval • sin π 2 f (a, t) . (7) In the next part of the ZePoC encoder the signals Y R (a, t) and Y I (a, t) have to pass a low pass filter (LPF).For an analytical formulation of the LPF it is essential to know the frequency component of these signals.Therefore the sine, cosine and the exponential function will be substituted by Taylor polynomials (8)

Approximation of the AEM by Taylor polynomials
The exponential function e y and the trigonometric functions sine and cosine are approximated by Taylor polynomials where N determines the degree.The Taylor expansions are performed at the point 0 because of the symmetrical range of the arguments around this point.
Beginning with the definition of the Taylor polynomial EXP N (y) for e y the variable y is set to the argument of the exponential function which has to be approximated.This gives a sum of sin n (t) terms with constant coefficients.Expanding these terms results in a sum of cosine terms with frequency factors n = 0, 1, . .., N and constant coefficients A N,n,s .The index N is the degree of the Taylor polynomial, n is the frequency factor and s = 0 means there is no alternating sign in the sum.The Taylor polynomial for y = π 2 f (a, t) is defined as Similar to Eq. ( 9) the sine and cosine function are approximated by Taylor polynomials.The index s = 1 of the amplitude coefficients A N,k,s (a) indicates that there are alternating signs (−1) n in the sums COS N and SIN N with .The floor functions ensure that every degree N ∈ N can be used in Eqs. ( 10) and ( 11).
The constant amplitude coefficients A N,k,s (a) can be written in a compact sigma notation.Three different cases have to be considered: k = 0, k is even and k is odd.Next the products consisting of the sums EXP N • COS N and EXP N •SIN N have to be expanded.After sorting all terms by frequency and summarizing all constants, Y R (a, t) and Y I (a, t) can be written in a compact sigma notation as The constant coefficients M N,k (a) are given by a double sum over the products of two amplitude coefficients A N,k,s (a) and defined as All M N,k (a) have to be recalculated if the amplitude a of the input signal is modified.
Table 1 shows the absolute error and the accuracy of the AEM approximated by Taylor polynomials of degree N. It can be seen that for the specified accuracy of 120 dB a degree of N = 12 is sufficient.

Low pass filter (LPF)
In consequence of nonlinear mathematical operations inside the AEM the signals Y R (a, t) and Y I (a, t) are no longer bandlimited.All signal components with frequencies above f c = c • f a have to be suppressed by the low pass filters (LPFs).To apply the LPFs only the upper bound of summation 2N − 1 has to be replaced by c .No frequency components with a frequency factor greater than c can pass the LPFs.The output signals of the LPFs are If the LPFs are disabled, ZePoC encoding becomes equal to a natural pulse width modulation (NPWM).

Single-sideband phase modulation
The time function m(c, a, t) is built by mixing the complex signal Z(c, a, t) = Z R (c, a, t)+j Z I (c, a, t) with the complex carrier signal C = cos(ct) + j sin(ct) as follows: For a = 0.99 and c = 6.25 this function is periodic with period t = 8π .Figure 5 shows a plot of m(c, a, t) over one full period.

Generating the bit stream
To generate the bit stream for the serializer each bit of the stream must be set to a defined value.Therefore the function m(c, a, t) must be evaluated at the center of each bit.Depending on this result (greater or less than zero) these bits are set.In Fig. 4 this operation is depicted as sign function.
For generating the bit stream in an efficient way, the zeros of m(c, a, t) must be found.It is not necessary to find the exact positions of the zeros because of the bit stream's discrete time domain.
To find the zeros with little effort, a binary search algorithm is used.Figure 8 illustrates the concept of this algorithm for n = 3.The search area is exactly between two zeros of the carrier signal sin(ct), enframing one zero of m(c, a, t).
The search starts in the middle of the search area.At the current position, the sign of m(c, a, t) will be evaluated.Depending on the sign the direction of the jump is chosen to be left or right.After each jump the jump distance will be halved.For a search area of 2 n bits n jumps have to be executed to find the bit Z where the zero crossing of m(c, a, t) is.
All bits in the search area left of Z are set to logic one and all bits right of Z are set to logic zero.To find out if the bit Z is a logic one or zero, an additional jump must be executed.If this last jump was to the right, bit Z is set to logic one, else Z is set to zero.The additional jump is similar to a rounding function and helps to reduce the DC component of the binary signal b(t).with an analogue LPF.For all simulations the time base is assumed to be ideal.

Real-time implementation
During simulation a frequency factor c ∈ Q is used which results in a periodic binary signal b(t).If b(t) is periodical then one period of b(t) can be computed and stored in memory.No real-time processing is necessary in this case.
For an arbitrary frequency of the AC signal c ∈ R is required.Now b(t) is no longer periodical and a real-time implementation of the ZePoC encoder is required.

Interpolation of sine and cosine functions
For the numerical evaluation of sine and cosine functions often the CORDIC algorithm is used.CORDIC stands for COordinate Rotation DIgital Computer and is an iterative algorithm (Gupta, 2010).Iterative algorithms often need too much computing time and are not suitable for a real-time implementation of this ZePoC encoder on a DSP.
A very fast way to evaluate functions is to use a look-up table (LUT) combined with linear interpolation.The argument of the function will be equidistant discretized.For each discrete argument the exact function value will be evaluated.Every two function values next to each other define a straight line as shown in Fig. 9.The slope and offset of each line are stored in a table.
To compute a function value the correct line must be located depending on the argument.Then the slope and offset of the selected straight line are read from the table.The resulting linear equation returns the interpolated function value.
For an accuracy of 120 dB the absolute error must be less than 10 −6 .Linear interpolation of sin(x) and cos(x) with x ∈ [−π, π ] using tables with 2 13  = 8192 entries has a maximum error of 0.3×10 −6 .Each table contains 4096 slope-and 4096 offset-coefficients.Both tables fit in one internal 0.75 Mbit SRAM block of the DSP.
The size of the tables can be reduced using the symmetries sin(−x) = − sin(x) and sin π 2 + x = sin π 2 − x .Also the cosine function can be expressed as a π 2 phase shifted sine function.If a reduced table is used a case analysis is necessary which needs valuable computing time in a real-time system.

Effects of different floating point formats
Floating point (FP) numbers are stored in a special binary format.Any FP number consists of a sign S, an exponent E and a mantissa M. For normalized signals in the closed interval [−1, 1] the length of the mantissa M is the most important factor for accuracy (Muller, 2009).
Table 2 lists the properties of the used FP formats single, extended single and double.Always one bit is used for the sign whereas the number of bits representing exponent and mantissa varies.Only single and double precision numbers are standardized by IEEE 754 and natively supported by MATLAB ® .All simulations in the last section were done using 64 bit double precision.Double precision numbers are not natively supported by the DSP.To use these 64 bit numbers on the DSP software emulation is required.This software emulation needs a lot of computing power and slows down the ZePoC algorithm dramatically.Therefore it is very important to use only FP formats natively supported by the DSP.The computation time for algorithms using 40 bit instead of 32 bit FP numbers is the same.
For generating an AC signal with a frequency f a = 50 Hz at a switching frequency of f sw = 2f c = 2cf a = 6.25 kHz a factor c = 62.5 is required.An amplitude of a = 0.99 avoids overmodulation.The  The main difference between the spectra is the noise floor.For double precision every bin is below −130 dB and many bins are not visible because they are below the plot range of −180 dB.When using extended single precision the noise floor contains many more visible bins but also here no bin exceeds −130 dB.Only for single precision numbers the noise floor reaches −100 dB which is outside the specification of −120 dB.

Conclusions
This contribution shows that an analytical formulation of a ZePoC encoder is possible for sinusoidal input signals.The accuracy can be determined by the degree of the Taylor polynomials used to approximate the AEM.
A new pulse shaper with a very high time resolution based on a FPGA will be used for the voltage channel of the AC power standard.Therefore an easy and fast algorithm to generate a bit stream for the GHz serializer inside the FPGA is presented.
For the real-time implementation on a DSP the effects of different floating point number formats are analyzed.The accuracy of extended single precision floating point numbers is sufficient for the specified AC power standard.

Figure 1 .Figure 2 .
Figure 1.AC power standard: block diagram of the voltage channel.

Figure 3 .
Figure 3. Specified spectral characteristics of the PWM signal.

Figure 5 .
Figure 5.One periode of m(c, a, t) for a = 0.99 and c = 6.25.

Figure 6 Figure 8 .
Figure 6 displays the spectrum for a = 0.99 and c = 6.25 of the binary signal b(t) generated by the ZePoC encoder.The disturbances within the separated baseband are below −120 dB.The spectral gap between the AC signal and the disturbances allows the use of an analogue LPF to suppress the switching noise at the output of the voltage channel.If the LPFs inside the ZePoC encoder are disabled, ZePoC encoding becomes equal to NPWM.Figure7shows the NPWM spectrum with the same parameters a and c.Here it is not possible to separate the AC signal and the disturbances

Figure 9 .
Figure 9. Linear interpolation of a discretized function.
binary PWM signal b(t) is computed by the real-time ZePoC encoder implemented on the DSP.All three FP formats are used to generate b(t) with different accuracies.Figures 10, 11 and 12 show the resulting spectra of the PWM signal for the different FP number formats.

Table 1 .
Accuracy of the approximated AEM