Articles | Volume 6
Adv. Radio Sci., 6, 259–264, 2008
https://doi.org/10.5194/ars-6-259-2008
Adv. Radio Sci., 6, 259–264, 2008
https://doi.org/10.5194/ars-6-259-2008

  26 May 2008

26 May 2008

Hardware Accelerators for Elliptic Curve Cryptography

C. Puttmann1, J. Shokrollahi2, M. Porrmann1, and U. Rückert1 C. Puttmann et al.
  • 1Heinz Nixdorf Institute, University of Paderborn, Germany
  • 2Chair for System Security, Ruhr-University of Bochum, Germany

Abstract. In this paper we explore different hardware accelerators for cryptography based on elliptic curves. Furthermore, we present a hierarchical multiprocessor system-on-chip (MPSoC) platform that can be used for fast integration and evaluation of novel hardware accelerators. In respect of two application scenarios the hardware accelerators are coupled at different hierarchy levels of the MPSoC platform. The whole system is implemented in a state of the art 65 nm standard cell technology. Moreover, an FPGA-based rapid prototyping system for fast system verification is presented. Finally, a metric to analyze the resource efficiency by means of chip area, execution time and energy consumption is introduced.