Design and realization of a broadband single-sideband mixer with a very short settling time

To achieve high range resolution in synthetic aperture radar imaging a frequency synthesizer with high bandwidth is a possible solution. To operate in the required frequency band an LF-signal usually has to be upconverted. In this paper we describe the design and realization of a broadband Single-Side-Band Mixer with a very short settling time between frequency steps of arbitrary length inside a high bandwidth. Compared to already existing SSB-Mixers, our novel concept has three major advantages: At first, the mixer could be used in combination with an arbitrary signal source. Due to a modular circuit concept it is possible to use the system for different input frequency ranges. Moreover, just by changing single modules, the output frequency-range can be adapted to individual requirements. Thirdly, as a main advantage, the system is able to generate a high frequency output span with a very fast settling time between frequency steps. Even with applied steps up to 400 MHz, the settling time remains below 3 μs, which is more than 5 times faster than the settling time of similar synthesizers.


Introduction
A few requirements have been claimed for developing the single side band mixer: A fast frequency sweep, a high output spectrum and a high sideband supression.For synthetic radar imaging with a stepped frequency synthesizer, for example, frequency ramps have to be generated and therefore the system has to be able to switch very fast between discrete frequency steps of up to 400 MHz.Within this time the sideband suppression has to rise as much as possible.Due to a modular concept, the system could be adapted to different signal sources and various RF-frequency-ranges (Haßler, 2009).

System design
There are different concepts how to convert frequency with a high sideband suppression.In Fig. 1 there is shown a fundamental circuit concept of our mixer.The signal is devided into two channels with a relative phase difference of 90 • .
The signals amplitude is equalized by an AGC.Due to the requirement of a very fast settling time, the time-constant of the AGC is a fundamental criterion of choice.A broadband AGC unit is necessary to allow a high input spectrum.The output level of the AGC is compared to the setpoint and the difference converted into a current which charges an external capacitor.The voltage at the capacitance adjusts the amplification factor.The smaller the capacitance the lower the settling time but also the higher the probabilty that the system oscillates.With our system we achieve a settling time of 1 µs.The influence of the amplitude differences between the two signal paths on the sideband suppression has been evaluated using a simulation.To show the influence of amplitude differences between the two signal paths on the sideband suppression, the single sideband mixer was simulated.For this simulation, a phase difference of 90 • between the I-and Qsignal was assumed.Figure 2 shows the output spectrum of the single sideband mixer during the settling time after a 400 MHz step.Figure 3 shows the output spectrum after the settling time.The different sideband suppression is obvious.
Each signal is mixed with the VCO signal, that is splitted in an inphase and a quadrature component as well.Assuming an equivalent signal level and a phase difference is 90 • Fig. 4 shows the spectra of the input signals AI1 and AQ1 together with the output signal.

Amplitude and phase error
Referring to Fig. 1, the input signals AI1 and AQ1 can be written as Published by Copernicus Publications on behalf of the URSI Landesausschuss in der Bundesrepublik Deutschland e.V.

SYSTEM DESIGN
There are different concepts how to convert frequency with a high sideband suppression.In Fig. 1 there is shown a fundamental circuit concept of our mixer.The signal is devided into two channels with a relative phase difference of 90 • .The signals amplitude is equalized by an AGC.Due to the requirement of a very fast settling time, the time-constant of the AGC is a fundamental criterion of choice.A broadband AGC unit is necessary to allow a high input spectrum.The output level of the AGC is compared to the setpoint and the difference converted into a current which charges an external capacitor.The voltage at the capacitance adjusts the amplification factor.The smaller the capacitance the lower the settling time but also the higher the probabilty that the system oscillates.With our system we achieve a settling time of 1 μs.The influence of the amplitude differences between the two signal paths on the sideband suppression has been evaluated using a simulation.To show the influence of amplitude differences between the two signal paths on the sideband suppression, the single sideband mixer was simulated.For this simulation, a phase difference of 90 • between the I- and After a few steps, the output signal can be calculated for the upper and lower sideband In Fig. 5 the sideband suppression is shown in dependence on the relative phase error and the amplitude deviation in both channels. and After a few steps, the output signal can be calculated for the upper and lower sideband In Fig. 5 the sideband suppression is shown in dependence on the relative phase error and the amplitude deviation in both channels.and After a few steps, the output signal can be calculated for the upper and lower sideband where In Fig. 5 the sideband suppression is shown in dependence on the relative phase error and the amplitude deviation in both channels.
Obviously both, an amplitude and a phase deviation have a strong influence on the sideband suppression.A phase error of 3 • approximately deteriotrates the signal as much as an amplitude error of about 2 dB.

Generation of a broad band I/Q signal
There are a variety of possibilities to generate a broadband I/Q signal.Under consideration of the requirements of a wideband input spectrum and a very fast settling time and regarding previous results of the analysis of phase-and amplitude errors, three concepts have been proven as applicable.

RC-CR phase shifter
The first possibility to generate a 90 • phase difference, is an RC-CR combination.Identical resistors and capacitors assumed, this construction always provides a relative phase difference of 90 • .With the transfer functions of the lowand highpass (Eqs.5, 6) it can be shown, that the relative phase difference between this two filters remains 90 • over the whole frequency range. and (2) After a few steps, the output signal can be calculated for the upper and lower sideband In Fig. 5 the sideband suppression is shown in dependence on the relative phase error and the amplitude deviation in both channels.Obviously both, an amplitude and a phase deviation have a strong influence on the sideband suppression.A phase error of 3 • approximately deteriotrates the signal as much as an amplitude error of about 2 dB.

GENERATION OF A BROAD BAND I/Q SIGNAL
There are a variety of possibilities to generate a broadband I/Q signal.Under consideration of the requirements of a wideband input spectrum and a very fast settling time and regarding previous results of the analysis of phase-and amplitude errors, three concepts have been proven as applicable.
An issue of this type of phase shifter is the antipodal change of the amplitude levels in both signal channels.To achieve good results in sideband suppression the amplitudes of both signals have to be equal.This is done by an automatic-gaincontrol unit (AGC).In Fig. 6 the difference between the in-Haßler, Reichthalhammer: Design and Realization of a Broadband Single-S

RC-CR PHASE SHIFTER
The first possibility to generate a 90 • phase difference, is an RC-CR combination.Identical resistors and capacitors assumed, this construction always provides a relative phase difference of 90 • .With the transfer functions of the low-and highpass ( 5), ( 6) it can be shown, that the relative phase difference between this two filters remains 90 • over the whole frequency range. (5) An issue of this type of phase shifter is the antipodal change of the amplitude levels in both signal channels.To achieve good results in sideband suppression the amplitudes of both signals have to be equal.This is done by an automatic-gain-control unit (AGC).In Fig. 6 the difference between the inphase and quadrature channel is depicted.For a frequency step from 400 MHz to 50 MHz the maximum difference is approximately 18 dB.An increasing difference of the amplitudes causes a higher time constant of the AGC.To minimize the deterioration of the fast settling time, the amplitude influence of the phase shifter should be kept as small as possible.The phase response of this RC-CR component, which is designed for an input frequency range from 50 MHz to 400 MHz, is shown in Fig. 7.
Up to a frequency of 360 MHz the phase error remains smaller than 2.5 • .phase difference in degree The in strictions that the u and B2 c phase and quadrature channel is depicted.For a frequency step from 400 MHz to 50 MHz the maximum difference is approximately 18 dB.
An increasing difference of the amplitudes causes a higher time constant of the AGC.To minimize the deterioration of the fast settling time, the amplitude influence of the phase shifter should be kept as small as possible.The phase response of this RC-CR component, which is designed for an input frequency range from 50 MHz to 400 MHz, is shown in Fig. 7.

DELAY LINE PHASE SHIFTER
Another concept for phase shifting is shown in Fig. 8.The generation of a 90 • phase difference is realized exclusively with transducers and delay lines.Every transducer is used to split a single-ended signal into a differential signal.For mathematical description, the input signal is written vectorial.The input phase offset can be set to zero without further restrictions and the time dependence can be ignored.Assuming that the upper output of every balun is delayed by 180 • B1 and B2 can be written as Up to a frequency of 360 MHz the phase error remains smaller than 2.5 • .

Delay line phase shifter
Another concept for phase shifting is shown in Fig. 8.The generation of a 90 • phase difference is realized exclusively with transducers and delay lines.Every transducer is used to split a single-ended signal into a differential signal.For mathematical description, the input signal is written vectorial.
The input phase offset can be set to zero without further restrictions and the time dependence can be ignored.Assuming that the upper output of every balun is delayed by 180 • B1 and B2 can be written as Each signal is divided by a transducer.The signals C2 and C4 are delayed and compared to C1 and C3.To get a relative phase difference of 90 Using the dot product (13), it can be shown that the signal vectors at the output ports are perpendicular to each other and therefore the phase difference is 90 • , assumed that both delay lines cause the same phase difference.
The attenuation of the delay lines can be neglected and the phase difference of all balun-output-signals accounts for 180 • .Due to the frequency dependence of the electrical length of the delay line (Pozar, 1998) the phase difference is Figure 9 shows the variation of the absolute amplitudes at Port2 and Port3, as well as the amplitude difference between the two output signals versus the phase delay caused by the delay lines.
To minimize the amplitude deviation of the output signals at a high frequency step it is necessary to scale the delay line.The phase delay should remain within 50 • to 150 • inside a frequency range of 50 MHz to 400 MHz.Considering the attenuation of the delay lines Fig. 10 visualizes the result.
Measurements of the transfer coefficients S21 are shown in Figs.11 and 12. Figure 11 shows the absolute value of S21.A frequency step of 350 MHz causes an amplitude deviation of 25 dB.
Regarding Fig. 12 the measured phase deviation is up to 15 • .Compared to theory and to the RC-CR module, this component shows a poorer behavior, since a lot of small degradations are accumulated.

Active allpass as phase shifter
The third possibilty generating an I/Q signal is an active allpass filter.The absolute value of the transfer function is a constant one what in turn makes an AGC dispensable.To maintain equivalent amplitude levels in both signal paths an active allpass filter is used to get a phase difference of 90 • at the output.But an allpass with a fixed capacitor generates a phase delay of 90 • at merely one frequency point.So the capacitor values of the allpass have to be controlled.In our circuit this is done by a varicap.In addition the allpass in the upper signal path only adds a phase offset to the signal, while the relative phase difference between the two signal paths is generated through the allpass in the lower signal path.The phase response of an allpass is The required capacitor value of the varicap C var can be calculated in order to get a phase delay of 90 • independent of the frequency.The input phase offset can be set to zero without further restrictions and the time dependence can be ignored.Assuming that the upper output of every balun is delayed by 180 • B1 and B2 can be written as To avoid a phase drift a closed loop control is used.The nonlinear closed loop Eq. ( 17) adjusts the varicap to get a constant phase shift of 90 • .
where PI(U 90 • − U φ ) and (C(U var )) are the transfer functions of the PI-controller and the active allpass, respectively.The nonlinearity is a reason not to design a stand-alone solu-4 Haßler, Reichthalhammer: Design and Realization of a Broadband Single-Side-Band Mixer with a very short Settling Time Each signal is divided by a transducer.The signals C2 and C4 are delayed and compared to C1 and C3.To get a relative phase difference of 90 • independent of frequency between the output signals Port2 and Port3, the length of the delay line can be choosen arbitrarily.The amplitude difference of the output signals increases, if the electrical length of the delay line or phase difference between C2 and C1, and as well between C4 and C3, becomes smaller.With ΔΦ C2 and ΔΦ C4 being the phase differences caused by the delay lines C2 and C4, the output signals at Port2 and Port3 can be written as: Using the dot product (13), it can be shown that the signal vectors at the output ports are perpendicular to each other and therefore the phase difference is 90 • , assumed that both delay lines cause the same phase difference.
The attenuation of the delay lines can be neglected and the phase difference of all balun-output-signals accounts for 180 • .Due to the frequency dependence of the electrical length of the delay line (Pozar, 1998) the phase difference is

ACTIVE ALLPASS AS PHASE SHIFTER
The third possibilty generating an I/Q signal is an active allpass filter.The absolute value of the transfer function is a constant one what in turn makes an AGC dispensable.To maintain equivalent amplitude levels in both signal paths an active allpass filter is used to get a phase difference of 90 • at the output.But an allpass with a fixed capacitor generates a phase delay of 90 • at merely one frequency point.So the capacitor values of the allpass have to be controlled.In our circuit this is done by a varicap.In addition the allpass in the upper signal path only adds a phase offset to the signal, while the relative phase difference between the two signal paths is tion with an allpass.But the transfer function of the allpass could be linearized if the control range of the varicap was smaller.This can be realized by a combination of an RC-CR element and an allpass.In this case the allpass only has to compensate a residual phase shift of about 5 • .
Figure 13 shows the large signal schematic of the control loop.The control variable and the output variable is the same one ϕ out1 .The required capacitor value of the varicap C var can be calculated in order to get a phase delay of 90 • independent of the frequency.
To avoid a phase drift a closed loop control is used.The following nonlinear closed loop equation ( 17) adjusts the varicap to get a constant phase shift of 90 • .

Δϕ(C(U
where PI(U 90 • − U Δφ ) and (C(U var )) are the transfer functions of the PI-controller and the active allpass, respec-tively.The nonlinearity is a reason not to design a standalone solution with an allpass.But the transfer function of the allpass could be linearized if the control range of the varicap was smaller.This can be realized by a combination of an RC-CR element and an allpass.In this case the allpass only has to compensate a residual phase shift of about 5 • .Fig. 13 shows the large signal schematic of the control loop.The control variable and the output variable is the same one ϕ out1 .With an offset voltage U off the operation point is adjusted.The phase delay can be written as The transfer functions of the allpass and the phase detector have to be linearized.Linearizing the allpass the input signal U var can be written as The allpass transfer function differentiated with respect to ΔU var yields (20) in the operating point.The phase difference detected by the phase detector is Now the input signal of the PI-controller is where m•Δϕ(f ) ist the characteristic line of the phase detector.Taking into account the PI-controller the control voltage U var yields With an offset voltage U off the operation point is adjusted.The phase delay can be written as The transfer functions of the allpass and the phase detector have to be linearized.Linearizing the allpass the input signal U var can be written as The allpass transfer function differentiated with respect to U var yields in the operating point.The phase difference detected by the phase detector is Now the input signal of the PI-controller is where m• ϕ(f ) ist the characteristic line of the phase detector.Taking into account the PI-controller the control voltage U var yields where K I and K P are the intergrated and the proportional part of the controller, respectively.Finally the transfer function of the control loop.
where W (s) is an interference signal concerning the phase difference.It is used to simulate the change of phase difference between the two channels.The required capacitor value of the varicap C var can be calculated in order to get a phase delay of 90 • independent of the frequency.
To avoid a phase drift a closed loop control is used.The following nonlinear closed loop equation ( 17) adjusts the varicap to get a constant phase shift of 90 • .

Δϕ(C(U
where PI(U 90 • − U Δφ ) and (C(U var )) are the transfer functions of the PI-controller and the active allpass, respec-

Frequency conversion and signal superposition
For upconverting the frequency in both signal paths a mixer (Fig. 1) with a wide output spectrum and a high LO suppression was chosen.The LO consists of a VCO with a PLL.The phase difference of 90 • is done by a discrete power splitter and the superposition of the signals at the output by a resistive combiner.

Phase stability
The control loop was simulated in Matlab (Angermann and Beuschel, 2005).A settling time lower than 3 µs can be achieved.Figure 14 shows the control behaviour after an applied phase deviation, that is similar to a frequency step of 350 MHz at the input.The time delay to adjust the manipulated phase to 90 • can be seen clearly.

Measurement of side band suppression
The setup for the measurement is as follows: The input signal is splitted by a resistive divider.For the inphase and quadrature signal generation an RC-CR filter is used followed by an AGC with a settling time below 3 µs.An allpass as described in Sect.4.3 is resigned but could improve the results.The achievable sideband suppression is shown in Fig. 15.

Conclusions
We designed a broadband single side band mixer with a very short settling time.The modular setup allows simple changing.For generating an I/Q signal with high bandwidth three methods have been analyzed.An RC-CR element, a phase shifter with transducers and delay lines and finally an active allpass filter.With an offset voltage U off the operation point is adjusted.The phase delay can be written as The transfer functions of the allpass and the phase detector have to be linearized.Linearizing the allpass the input signal U var can be written as The allpass transfer function differentiated with respect to ΔU var yields ) in the operating point.The phase difference detected by the phase detector is

PERPOSITION
For upconverting the frequency in both signal paths a mixer Fig. 1 with a wide output spectrum and a high LO suppression was chosen.The LO consists of a VCO with a PLL.The phase difference of 90 • is done by a discrete power splitter and the superposition of the signals at the output by a resistive combiner.

PHASE STABILITY
The control loop was simulated in Matlab (A.Angermann, 2005).A settling time lower than 3 μs can be achieved.Fig. 14 shows the control behaviour after an applied phase deviation, that is similar to a frequency step of 350 MHz at the input.The time delay to adjust the manipulated phase to 90 • can be seen clearly.

Conclusions
We designed a broadband single side band mixer with a very short settling time.The modular setup allows simple changing.For generating an I/Q signal with high bandwidth three methods have been analyzed.An RC-CR element, a phase shifter with transducers and delay lines and finally an active allpass filter.Each individual method has its advantages but the RC-CR filter was chosen, since the phase error is best inside the required bandwidth and equalizing the amplitudes up to a difference of 18 dB can be obtained by a fast AGC.In combination with an active allpass filter the phase error could be even improved.The described combination was build up and evaluated.It is shown, that a settling time of less than 3μs is possible within the bandwidth of 400 MHz.Hence the signal source can be used as synthsizer for stepped frequency radar and could even be used as a hopped frequency signal source.the RC-CR filter was chosen, since the phase error is best inside the required bandwidth and equalizing the amplitudes up to a difference of 18 dB can be obtained by a fast AGC.In combination with an active allpass filter the phase error could be even improved.The described combination was build up and evaluated.It is shown, that a settling time of less than 3 µs is possible within the bandwidth of 400 MHz.Hence the signal source can be used as synthsizer for stepped frequency radar and could even be used as a hopped frequency signal source.

References
6 Haßler, Reichthalhammer: Design and Realization of a Broadband Single-Side-Band Mixer with a very short Settling Time where K I and K P are the intergrated and the proportional part of the controller, respectively.Finally the transfer function of the control loop.
where W(s) is an interference signal concerning the phase difference.It is used to simulate the change of phase difference between the two channels.

FREQUENCY CONVERSION AND SIGNAL SU-PERPOSITION
For upconverting the frequency in both signal paths a mixer Fig. 1 with a wide output spectrum and a high LO suppression was chosen.The LO consists of a VCO with a PLL.The phase difference of 90 • is done by a discrete power splitter and the superposition of the signals at the output by a resistive combiner.

PHASE STABILITY
The control loop was simulated in Matlab (A.Angermann, 2005).A settling time lower than 3 μs can be achieved.Fig. 14 shows the control behaviour after an applied phase deviation, that is similar to a frequency step of 350 MHz at the input.The time delay to adjust the manipulated phase to 90 • can be seen clearly.

MEASUREMENT OF SIDE BAND SUPPRES-SION
The setup for the measurement is as follows: The input signal is splitted by a resistive divider.For the inphase and quadrature signal generation an RC-CR filter is used followed by an AGC with a settling time below 3μs.An allpass as described in (4.3) is resigned but could improve the results.The achievable sideband suppression is shown in Fig. 15.

Conclusions
We designed a broadband single side band mixer with a very short settling time.The modular setup allows simple changing.For generating an I/Q signal with high bandwidth three methods have been analyzed.An RC-CR element, a phase shifter with transducers and delay lines and finally an active allpass filter.Each individual method has its advantages but the RC-CR filter was chosen, since the phase error is best inside the required bandwidth and equalizing the amplitudes up to a difference of 18 dB can be obtained by a fast AGC.In combination with an active allpass filter the phase error could be even improved.The described combination was build up and evaluated.It is shown, that a settling time of less than 3μs is possible within the bandwidth of 400 MHz.Hence the signal source can be used as synthsizer for stepped frequency radar and could even be used as a hopped frequency signal source.

Fig. 1 .
Fig. 1.Systemconcept: single sideband mixer. 2 Haßler, Reichthalhammer: Design and Realization of a Broadband Single-Side-Band Mixer with a very short Settling Time

Fig. 5 .
Fig. 5. Influence of phase-and amplitude errors on the side band

Fig. 5 .
Fig. 5. Influence of phase-and amplitude errors on the side band suppression

Fig. 5 .
Fig. 5. Influence of phase-and amplitude errors on the side band suppression.

Fig. 6 .
Fig. 6.Amplitude difference of I and Q channel of RC-CR element

Fig. 6 .
Fig. 6.Amplitude difference of I and Q channel of RC-CR element.

Fig. 8 .
Fig. 8. Phase shifter consisting of transducers and delay lines

Fig. 7 .
Fig. 7. Phase difference of I and Q channel of RC-CR element.

Fig. 8 .
Fig. 8. Phase shifter consisting of transducers and delay lines

Fig. 9 Fig. 9 .Fig. 10 .
Fig.9 shows the variation of the absolute amplitudes at Port2 and Port3, as well as the amplitude difference between the two output signals versus the phase delay caused by the delay lines.To minimize the amplitude deviation of the output signals at a high frequency step it is necessary to scale the delay line.The phase delay should remain within 50 • to 150 • inside a frequency range of 50MHz to 400 MHz.Considering the attenuation of the delay lines Fig.10 visualizes the result.Measurements of the transfer coefficients S21 are shown in Fig.11 and Fig.12.Fig.11) shows the absolute value of S21.A frequency step of 350 MHz causes an amplitude deviation of 25 dB.Regarding Fig.12the measured phase deviation is up to 15 • .Compared to theory and to the RC-CR module, this

Fig. 11 .Fig. 12 .
Fig. 11.Measured amplitude difference between the two output signals of the phase shifter with delay lines

Fig. 13 .
Fig. 13.control loop of the active phase shifter

Fig. 11 .
Fig. 11.Measured amplitude difference between the two output signals of the phase shifter with delay lines.

Fig. 11 .Fig. 12 .
Fig. 11.Measured amplitude difference between the two output signals of the phase shifter with delay lines

Fig. 14 .
Fig. 14.Matlab/Simulink simulation of the small signal control loop
Each individual method has its advantages but