Articles | Volume 12
https://doi.org/10.5194/ars-12-111-2014
https://doi.org/10.5194/ars-12-111-2014
10 Nov 2014
 | 10 Nov 2014

Efficiency modeling for MHz DCDC converters at 40 V input voltage range

J. Wittmann, A. Seidel, and B. Wicht

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Cited articles

Mattausch, H. J., Sadachika, N., Yokomichi, M., Miyake, M., Kajiwara, T., Oritsuki, Y., Sakuda, T., Kikuchihara, H., Feldmann, U., and Miura-Mattausch, M.: Power/HVMOS Devices Compact Modeling, chap. 2: HiSIM-HV: A Scalable, Surface-Potential-Based Compact Model for High-Voltage MOSFETs, Springer, 2010.
Wang, X. and Huang, A.: Capacitor energy variation based designer-side switching losses analysis for integrated synchronous Buck converters in CMOS technology, in: Applied Power Electron. Conf. and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE, 1130–1137, https://doi.org/10.1109/APEC.2011.5744736, 2011.
Wang, X., Park, J., Van Brunt, E., and Huang, A.: Switching losses analysis in MHz integrated synchronous Buck converter to support optimal power stage width segmentation in CMOS technology, in: Energy Conversion Congress and Expos. (ECCE), 2010 IEEE, 2718–2724, https://doi.org/10.1109/ECCE.2010.5618055, 2010.
Wittmann, J. and Wicht, B.: MHz-Converter Design for High Conversion Ratio, in: 2013 IEEE 25rd International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2014.
Wittmann, J., Funk, T., and Wicht, B.: Gate Driver Design for Fast Switching DC-DC Converters, in: 48th MPC Workshop, Aalen, 17–24, 2012.
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