A concept of low-cost hardware for radar target simulation is presented. The theoretical foundations are derived and analyzed. An implementation of a demonstrator operating in the 24 GHz ISM band is shown for which the dynamical range simulation was implemented in a FPGA with fast sampling 10 ADCs and DACs. By using a FIR filtering approach a fine discretization of the range could be reached which will furthermore allow an inherent and automatic Doppler simulation by moving the target.