Articles | Volume 4
https://doi.org/10.5194/ars-4-149-2006
https://doi.org/10.5194/ars-4-149-2006
04 Sep 2006
 | 04 Sep 2006

Das Verhalten nanostrukturierter Schaltungen unter der Berücksichtigung von Quanteneffekten

J.-K. Bremer, F. Felgenhauer, M. Begoin, and W. Mathis

Cited articles

Bai, P.: A 65 nm Logic Technology Featuring 35 nm Gate Lengths, Enhanced Channel Strain, 8 Cu Interconnect Layers, Low-k ILD and 0.57 μm2 SRAM Cell, Intel Corporation, USA, in Techn. IEEE Int. Electron Devices Meeting, 2004.