Design and quantitative analysis of parametrisable eFPGA-architectures for arithmetic

Neumann, B.; von Sydow, T.; Blume, H.; Noll, T. G.

doi:https://doi.org/10.5194/ars-4-251-2006

Articles | Volume 4

https://doi.org/10.5194/ars-4-251-2006

© Author(s) 2006. This work is licensed under
the Creative Commons Attribution-NonCommercial-ShareAlike 2.5 License.

https://doi.org/10.5194/ars-4-251-2006

© Author(s) 2006. This work is licensed under
the Creative Commons Attribution-NonCommercial-ShareAlike 2.5 License.

Articles | Volume 4

06 Sep 2006

| 06 Sep 2006

Design and quantitative analysis of parametrisable eFPGA-architectures for arithmetic

B. Neumann, T. von Sydow, H. Blume, and T. G. Noll

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Latest update: 26 Apr 2024

Design and quantitative analysis of parametrisable eFPGA-architectures for arithmetic

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