Temperature modeling and emulation of an ASIC temperature monitor system for Tightly-Coupled Processor Arrays (TCPAs)

Glocker, E.; Boppu, S.; Chen, Q.; Schlichtmann, U.; Teich, J.; Schmitt-Landsiedel, D.

doi:https://doi.org/10.5194/ars-12-103-2014

Articles | Volume 12

Adv. Radio Sci., 12, 103–109, 2014

https://doi.org/10.5194/ars-12-103-2014

© Author(s) 2014. This work is distributed under
the Creative Commons Attribution 3.0 License.

Adv. Radio Sci., 12, 103–109, 2014

https://doi.org/10.5194/ars-12-103-2014

© Author(s) 2014. This work is distributed under
the Creative Commons Attribution 3.0 License.

Articles | Volume 12

10 Nov 2014

Temperature modeling and emulation of an ASIC temperature monitor system for Tightly-Coupled Processor Arrays (TCPAs)

E. Glocker¹, S. Boppu², Q. Chen³, U. Schlichtmann³, J. Teich², and D. Schmitt-Landsiedel¹ E. Glocker et al.

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¹Lehrstuhl für Technische Elektronik, Technische Universität München (TUM), Theresienstr. 90, 80333 München, Germany
²Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design), Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Cauerstr. 11, 91058 Erlangen, Germany
³Lehrstuhl für Entwurfsautomatisierung, Technische Universität München (TUM), Arcisstr. 21, 80333 München, Germany

Received: 12 Dec 2013 – Revised: 17 Mar 2014 – Accepted: 27 Mar 2014 – Published: 11 Nov 2014

Abstract. This contribution provides an approach for emulating the behaviour of an ASIC temperature monitoring system (TMon) during run-time for a tightly-coupled processor array (TCPA) of a heterogeneous invasive multi-tile architecture to be used for FPGA prototyping. It is based on a thermal RC modeling approach. Also different usage scenarios of TCPA are analyzed and compared.