Articles | Volume 2
https://doi.org/10.5194/ars-2-199-2004
https://doi.org/10.5194/ars-2-199-2004
27 May 2005
 | 27 May 2005

Eine verlustleistungsoptimierte Dezimator-Architektur für kaskadierte Sigma-Delta Analog-Digital Umsetzer

M. Becker, K. Heiber, M. Ortmanns, and Y. Manoli

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