Articles | Volume 3
https://doi.org/10.5194/ars-3-271-2005
https://doi.org/10.5194/ars-3-271-2005
12 May 2005
 | 12 May 2005

Implementation and modeling of parametrizable high-speed Reed Solomon decoders on FPGAs

A. Flocke, H. Blume, and T. G. Noll

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