Articles | Volume 3
https://doi.org/10.5194/ars-3-271-2005
https://doi.org/10.5194/ars-3-271-2005
12 May 2005
 | 12 May 2005

Implementation and modeling of parametrizable high-speed Reed Solomon decoders on FPGAs

A. Flocke, H. Blume, and T. G. Noll

Viewed

Total article views: 1,455 (including HTML, PDF, and XML)
HTML PDF XML Total BibTeX EndNote
703 626 126 1,455 128 113
  • HTML: 703
  • PDF: 626
  • XML: 126
  • Total: 1,455
  • BibTeX: 128
  • EndNote: 113
Views and downloads (calculated since 01 Feb 2013)
Cumulative views and downloads (calculated since 01 Feb 2013)

Cited

Latest update: 05 Apr 2025
Download
Share