Articles | Volume 4
https://doi.org/10.5194/ars-4-303-2006
https://doi.org/10.5194/ars-4-303-2006
06 Sep 2006
 | 06 Sep 2006

A Verilog-A model of an undoped symmetric dual-gate MOSFET

O. Cobianu, O. Soffke, and M. Glesner

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