A VLSI design concept for parallel iterative algorithms

Sun, C. C.; Götze, J.

doi:https://doi.org/10.5194/ars-7-95-2009

Articles | Volume 7

https://doi.org/10.5194/ars-7-95-2009

© Author(s) 2009. This work is distributed under
the Creative Commons Attribution 3.0 License.

https://doi.org/10.5194/ars-7-95-2009

© Author(s) 2009. This work is distributed under
the Creative Commons Attribution 3.0 License.

Articles | Volume 7

18 May 2009

| 18 May 2009

A VLSI design concept for parallel iterative algorithms

C. C. Sun and J. Götze

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Total article views: 1,671 (including HTML, PDF, and XML)

HTML	PDF	XML	Total	BibTeX	EndNote
699	853	119	1,671	139	121

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PDF: 853
XML: 119
Total: 1,671
BibTeX: 139
EndNote: 121

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Month	HTML	PDF	XML	Total
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Apr 2013	2	13	0	15
May 2013	1	12	1	14
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Jul 2013	3	15	0	18
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Oct 2013	3	9	0	12
Nov 2013	14	0	14
Dec 2013	4	16	2	22
Jan 2014	2	11	3	16
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May 2014	1	10	1	12
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Mar 2013	5	14	3	22
Apr 2013	2	13	0	15
May 2013	1	12	1	14
Jun 2013	7	0	7
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Oct 2013	3	9	0	12
Nov 2013	14	0	14
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Apr 2014	4	9	0	13
May 2014	1	10	1	12
Jun 2014	5	6	0	11
Jul 2014	2	18	2	22
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Feb 2015	6	3	1	10
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Latest update: 19 Apr 2025

A VLSI design concept for parallel iterative algorithms

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