High-voltage circuits for power management on 65 nm CMOS

Pashmineh, S.; Killat, D.

doi:10.5194/ars-13-109-2015

Articles | Volume 13

https://doi.org/10.5194/ars-13-109-2015

© Author(s) 2015. This work is distributed under
the Creative Commons Attribution 3.0 License.

https://doi.org/10.5194/ars-13-109-2015

© Author(s) 2015. This work is distributed under
the Creative Commons Attribution 3.0 License.

Articles | Volume 13

03 Nov 2015

| 03 Nov 2015

High-voltage circuits for power management on 65 nm CMOS

S. Pashmineh and D. Killat

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Jan 2026	38	15	4	57
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Apr 2026	5	5	1	11

Cumulative views and downloads (calculated since 03 Nov 2015)

Month	HTML	PDF	XML	Total
Nov 2015	26	27	4	57
Dec 2015	5	12	0	17
Jan 2016	13	11	0	24
Feb 2016	10	20	1	31
Mar 2016	13	10	1	24
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Mar 2017	11	18	0	29
Apr 2017	8	15	4	27
May 2017	13	23	6	42
Jun 2017	12	32	5	49
Jul 2017	9	17	6	32
Aug 2017	4	30	4	38
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Oct 2017	2	16	1	19
Nov 2017	3	18	4	25
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Feb 2018	6	12	4	22
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Jul 2018	3	33	6	42
Aug 2018	7	19	5	31
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Apr 2019	4	20	3	27
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Jun 2024	10	15	1	26
Jul 2024	15	16	5	36
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Oct 2024	7	36	1	44
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Dec 2024	4	28	0	32
Jan 2025	6	17	0	23
Feb 2025	12	21	1	34
Mar 2025	9	14	1	24
Apr 2025	5	14	0	19
May 2025	30	15	1	46
Jun 2025	23	25	2	50
Jul 2025	22	23	1	46
Aug 2025	15	20	0	35
Sep 2025	18	14	0	32
Oct 2025	29	19	5	53
Nov 2025	23	14	1	38
Dec 2025	28	23	2	53
Jan 2026	38	15	4	57
Feb 2026	47	14	3	64
Mar 2026	26	13	2	41
Apr 2026	5	5	1	11

Latest update: 19 Apr 2026

Short summary

This paper presents two high-voltage circuits used in power management, a switching driver for buck converter with optimized on-resistance and a low dropout (LDO) voltage regulator with 2-stacked pMOS pass devices. The circuit design is based on stacked MOSFETs, thus the circuits are technology independent.