Journal cover Journal topic
Advances in Radio Science An open-access journal of the U.R.S.I. Landesausschuss in der Bundesrepublik Deutschland e.V.
Journal topic

Journal metrics

Journal metrics

  • CiteScore value: 1.1 CiteScore
    1.1
  • SNIP value: 0.568 SNIP 0.568
  • IPP value: 0.57 IPP 0.57
  • SJR value: 0.269 SJR 0.269
  • Scimago H <br class='hide-on-tablet hide-on-mobile'>index value: 21 Scimago H
    index 21
  • h5-index value: 7 h5-index 7
Volume 13
Adv. Radio Sci., 13, 109–120, 2015
https://doi.org/10.5194/ars-13-109-2015
© Author(s) 2015. This work is distributed under
the Creative Commons Attribution 3.0 License.
Adv. Radio Sci., 13, 109–120, 2015
https://doi.org/10.5194/ars-13-109-2015
© Author(s) 2015. This work is distributed under
the Creative Commons Attribution 3.0 License.

  03 Nov 2015

03 Nov 2015

High-voltage circuits for power management on 65 nm CMOS

S. Pashmineh and D. Killat S. Pashmineh and D. Killat
  • Brandenburg University of Technology, Department of Microelectronics, Cottbus, Germany

Abstract. This paper presents two high-voltage circuits used in power management, a switching driver for buck converter with optimized on-resistance and a low dropout (LDO) voltage regulator with 2-stacked pMOS pass devices. The circuit design is based on stacked MOSFETs, thus the circuits are technology independent.

High-voltage drivers with stacked devices suffer from slow switching characteristics. In this paper, a new concept to adjust gate voltages of stacked transistors is introduced for reduction of on-resistance. According to the theory, a circuit is proposed that drives 2 stacked transistors of a driver. Simulation results show a reduction of the on-resistance between 27 and 86 % and a reduction of rise and fall times between 16 and 83 % with a load capacitance of 150 pF at various supply voltages, compared to previous work. The concept can be applied to each high-voltage driver that is based on a number (N) of stacked transistors.
The high voltage compatibility of the low drop-out voltage regulator (LDO) is established by a 2-stacked pMOS transistors as pass device controlled by two regulators: an error amplifier and a 2nd amplifier adjusting the division of the voltages between the two pass transistors. A high GBW and good DC accuracy in line and load regulation is achieved by using 3-stage error amplifiers. To improve stability, two feedback loops are utilized.

In this paper, the 2.5 V I/O transistors of the TSMC 65 nm CMOS technology are used for the circuit design.

Publications Copernicus
Download
Short summary
This paper presents two high-voltage circuits used in power management, a switching driver for buck converter with optimized on-resistance and a low dropout (LDO) voltage regulator with 2-stacked pMOS pass devices. The circuit design is based on stacked MOSFETs, thus the circuits are technology independent.
This paper presents two high-voltage circuits used in power management, a switching driver for...
Citation