Articles | Volume 16
Adv. Radio Sci., 16, 99–108, 2018
https://doi.org/10.5194/ars-16-99-2018
Adv. Radio Sci., 16, 99–108, 2018
https://doi.org/10.5194/ars-16-99-2018
 
04 Sep 2018
04 Sep 2018

High-Speed Serializer for a 64 GS s−1 Digital-to-Analog Converter in a 28 nm Fully-Depleted Silicon-on-Insulator CMOS Technology

Daniel Widmann et al.

Viewed

Total article views: 1,126 (including HTML, PDF, and XML)
HTML PDF XML Total BibTeX EndNote
681 389 56 1,126 47 50
  • HTML: 681
  • PDF: 389
  • XML: 56
  • Total: 1,126
  • BibTeX: 47
  • EndNote: 50
Views and downloads (calculated since 04 Sep 2018)
Cumulative views and downloads (calculated since 04 Sep 2018)

Viewed (geographical distribution)

Total article views: 987 (including HTML, PDF, and XML) Thereof 980 with geography defined and 7 with unknown origin.
Country # Views %
  • 1
1
 
 
 
 
Latest update: 06 Oct 2022
Download
Short summary
Digital-to-analog converters (DACs) with very high conversion rates and bandwidth are of special interest for optical coherent transceiver systems and arbitrary waveform generators. An attractive solution to provide several channels with very high data rates of tens of Gbit/s is to use a high speed serializer. We present a CMOS serializer consisting of a 19 channel 16:1 multiplexer (MUX) for output data rates up to 64 Gbit/s per channel and a low skew clock distribution network.