Articles | Volume 15
https://doi.org/10.5194/ars-15-269-2017
https://doi.org/10.5194/ars-15-269-2017
05 Dec 2017
 | 05 Dec 2017

Design of a carrier-depletion Mach-Zehnder modulator in 250 nm silicon-on-insulator technology

María Félix Rosa, Lotte Rathgeber, Raik Elster, Niklas Hoppe, Thomas Föhn, Martin Schmidt, Wolfgang Vogel, and Manfred Berroth

Abstract. We present the design of a single-drive Mach-Zehnder modulator for amplitude modulation in silicon-on-insulator technology with 250 nm active layer thickness. The applied RF signal modulates the carrier density in a reverse biased lateral pn-junction. The free carrier plasma dispersion effect in silicon leads to a change in the refractive index. The modulation efficiency and the optical loss due to free carriers are analyzed for different doping configurations. The intrinsic electrical parameters of the pn-junction of the phase shifter like resistance and capacitance and the corresponding RC-limit are studied. A first prototype in this technology fabricated at the IMS CHIPS Stuttgart is successfully measured. The structure has a modulation efficiency of VπL = 3.1 V ⋅ cm at 2 V reverse bias. The on-chip insertion loss is 4.2 dB. The structure exhibits an extinction ratio of around 32 dB. The length of the phase shifter is 0.5 mm. The cutoff frequency of the entire modulator is 30 GHz at 2 V. Finally, an optimization of the doping structure is presented to reduce the optical loss and to improve the modulation efficiency. The optimized silicon optical modulator shows a theoretical modulation efficiency of VπL = 1.8 V ⋅ cm at 6 V bias and a maximum optical loss due to the free carrier absorption of around 3.1 dB cm−1. An ultra-low fiber-to-fiber loss of approximately 4.8 dB is expected using the state of the art optical components in the used technology.

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Short summary
We present the design of an optical modulator for amplitude modulation in a special silicon-on-insulator technology with 250 nm silicon layer thickness. The design of the modulator is optimized by simulating different parameters like dimension of the structure and doping of the silicon to improve the performance of the device. In addition, a prototype is fabricated and successfully measured to demonstrate the functionality of the technology.