Articles | Volume 17
19 Sep 2019
 | 19 Sep 2019

A low complexity digital frequency calibration with high jitter immunity for ultra-low-power oscillators

Markus Scholl, Ralf Wunderlich, and Stefan Heinen

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Cited articles

Burdett, A.: Ultra-Low-Power Wireless Systems: Energy-Efficient Radios for the Internet of Things, in: IEEE Solid-State Circuits Mag., 18–28,, 2015. a
Franklin, G. F., Powell, J. D., and Emami-Naeini, A.: Feedback Control of Dynamic Systems 7th, Prentice Hall Press Upper Saddle River, NJ, USA, 2014. a
Griffith, D., Røine, P. T., Murdock, J., and Smith, R.: A 190 nW 33 kHz RC oscillator with ±0.21 % temperature stability and 4 ppm long-term stability, in: Int. Solid-State Circuits Conf. Dig. Tech. Papers (ISSCC), 300–301,, 2014. a, b
Jeong, S., Lee, I., Blaauw, D., and Sylvester, D.: A 5.8 nW, 45 ppm/C on-chip CMOS wake-up timer using a constant charge subtraction scheme, in: Proc. Custom Integrated Circuits Conf. (CICC), 1–4,, 2014. a
Joonhyung, L., Kwangmook, L., and Koonsik, C.: Ultra low power RC oscillator for system wake-up using highly precise auto-calibration technique, in: Proc. European Solid-State Circuits Conf. (ESSCIRC), 274–277,, 2010. a
Short summary
Today's wireless transceivers are demanding for lowest power consumption to support long battery lifetime. These architectures utilize dutycycle schemes based on ultra-low-power (ULP) oscillators to reduce power consumption. These ULP oscillators are either using external components increasing the cost or they need calibration techniques to achieve absolute accuracy. This work presents an improved ULP calibration technique overcoming typical limitations of settling time and calibration accuracy.